PICTURE Digital Logic
calendar

On-Line Quiz System

An on-line quiz system has been provided for you, containing practice problems similar to that what you will find on the class examinations.

Boolean Algebra
Logic Gates and Circuits
Binary Numbers
min &Maxterms
K-Maps
Important CLCs
ROMS, PLDs & SLCs
Flip-flops & Clocks
SLC Design

[Quiz#1][Quiz#2][Quiz#3]
[Quiz#4][Quiz#5][Quiz#6]
[Quiz#7][Quiz#8][Quiz#9]

 

download

notes2 pict2

lab10 lab11 syllabus

 

The ECE 2500 HomePage

Welcome. This is your official information source for Introduction to Digital Logic, a freshman-level engineering course, offered by the Department of Electrical and Computer Engineering, currently serving approximately 100 students. In this course we examine engineering methods for designing digital logic circuits such as what is commonly found in computers and other kinds of digital hardware. ECE 250 is a required course for students majoring in electrical engineering, computer systems engineering and computer science. Your instructor this fall is Dr. Dean Johnson, an Associate Professor in the Department.


This Week's Schedule, Nov 17-19

Exam II is next week Tuesday, November 24. The second exam will consist of 20 multiple choice questions and cover the course material associated with four Quizzes 6-9. The exam will be closed book/notes/calculator as before.

This week in the lecture, we will continue our discussion of Sequential Logic Circuit (SLC) Design, including the five step procedure for designing SLCs. On Tuesday, we will explain more fully how Next State maps are transformed into JK maps, which is Step#4 of the design procedure. We will then apply the five step design procedure to an example problem involving code sequence detectors. On Thursday, we will continue examining the code sequence design problem, and will also review the prelab assignment for Lab11.

The last HW assignment this semester, Homework Seven on more sequential logic design, is due this Thursday at 12 midnight.

There will be no labs next week, Thanksgiving week. When you come back, you will do Lab11, where you will be asked to design a code sequence detector. The prelab assignment involves applying the five step SLC design procedure, and is worth 10 points.


Comments to: johnson@wmich.edu
Department of Electrical and Computer Engineering, Western Michigan University, Kalamazoo, MI 49008-5066,
Primary Author: Dean Johnson

 
http:/homepages.wmich.edu/~johnson/ece250/