This quiz examines tools used to design SLCs: state diagrams, state tables and procedures for synthesizing excitation equations describing these sequential logic circuits. The procedures utilized in the problems described below are taken from the lecture notes, and differ significantly from that described in the textbook. Follow the lecture notes carefully in answering the questions below. (Go back to homepage.) Which of the following equations best describes the output of a Class A (Mealy) type SLC? Given a Class C SLC, which of the following elements would Not be present? Which of the following state tables correctly describes the state diagram shown? ``` Table 1 Table 2 Table 3 Table 4 Table 5 PS X|NS Z PS X|NS Z PS X|NS Z PS X|NS Z PS X|NS Z a 0| b 0 a 0| c 1 a 0| c 0 a 0| a 0 a 0| c 1 a 1| c 1 a 1| b 0 a 1| a 0 a 1| b 0 a 1| b 0 b 0| c 0 b 0| c 0 b 0| a 1 b 0| c 0 b 0| a 1 b 1| a 1 b 1| a 1 b 1| b 0 b 1| b 1 b 1| b 0 c 0| a 0 c 0| b 0 c 0| b 0 c 0| b 0 c 0| a 0 c 1| b 0 c 1| a 0 c 1| c 1 c 1| a 0 c 1| c 1 ``` Given the state table shown, the output sequence Z generate by an input sequence X = 0001110 and starting state b is ``` PS X|NS Z ----|---- a 0| b 0 a 1| a 1 b 0| c 0 b 1| a 1 c 0| c 1 c 1| d 0 d 0| a 1 d 1| a 0 ``` Given state variables Y1, Y2 and input X, which of the following represent the correct contents of the K1 K-map given the next state (NS) map for Y1n+1 below? ``` ____Y1___ ____Y1___ _____________________ _____________________ | | | | | | | | | | | 1 | 0 | 1 | 0 | | ? | ? | ? | ? | |____|____|____|____| |____|____|____|____| || | | | | || | | | | X|| 1 | 1 | 0 | 0 | X|| ? | ? | ? | ? | ||____|____|____|____| ||____|____|____|____| _________ _________ Y2 Y2 Y1n+1 K1 Kmap 1: 1 0 d d Kmap 2: d d 1 0 1 1 d d d d 0 0 Kmap 3: d 1 0 d Kmap 4: d d 0 1 d 0 1 d d d 1 1 Kmap 5: 1 d d 0 1 d d 0 ``` Given state variables Y1, Y2 and input X, which of the following represent the correct contents of the J2 K-map given the next state (NS) map for Y2n+1 below? ``` ____Y1___ ____Y1___ _____________________ _____________________ | | | | | | | | | | | 1 | 0 | 1 | 0 | | ? | ? | ? | ? | |____|____|____|____| |____|____|____|____| || | | | | || | | | | X|| 1 | 1 | 0 | 0 | X|| ? | ? | ? | ? | ||____|____|____|____| ||____|____|____|____| _________ _________ Y2 Y2 Y2n+1 J2 Kmap 1: 1 0 d d Kmap 2: d d 1 0 1 1 d d d d 0 0 Kmap 3: d 1 0 d Kmap 4: d d 0 1 d 0 1 d d d 1 1 Kmap 5: 1 d d 0 1 d d 0 ``` Where should the left and right arrows be directed in order that the state diagram illustrated detect the input sequence X = 0011 with no overlap? What is the purpose of state c of the state diagram of the previous question? Where should the left and right arrows be directed in order that the state diagram illustrated detect the input sequence X = 1011 with overlap? What is the logic equation for the output Z for the state diagram of the previous question if the following state assignments are given: a = 00, b = 01, c = 10, d = 11. (Note: these are the Y1Y2 codes for the states a, b, c, d) Repeating the past question, what is the logic equation for Z if the state assignment is now a = 00, b = 10, c = 11, d = 01?