ECE 6410 Advanced Electronic Instrumentation

 

Fall 2015
version 7 January 2016

The online version of this syllabus at http://homepages.wmich.edu/~miller/ECE6410.html has hyperlinks and will be updated as needed.

Instructor

Dr. Damon A. Miller, Associate Professor of Electrical and Computer Engineering, Western Michigan University, College of Engineering and Applied Sciences, Parkview Campus, Room A-240, 269.276.3158, 269.276.3151 (fax), damon.miller@wmich.edu, www.homepages.wmich.edu/~miller/.

Office Hours

Guaranteed office hours are posted on Dr. Miller’s door and at http://homepages.wmich.edu/~miller/. Please respect my office hours.  Other times are available by appointment.

Description (WMU Graduate Catalog)

ECE 6410 Advanced Electronic Instrumentation, 3 hrs. Description, analysis, and design of instrumentation systems with emphasis on sensors, signal acquisition, amplification, and processing. Both analog and digital sensors and signal processors will be considered.  Prerequisites:  ECE 5410 (Electronic Instrumentation).

 

Textbook and Materials

Required:

1.  Sergio Franco, Design with Operational Amplifiers and Analog Integrated Circuits, 3rd edition, McGraw-Hill, New York, 2002. Errata are available at http://online.sfsu.edu/sfranco/BookOpamp/OpampsErrata.pdf

2.  Linear Technology, LTspice IV, available at no cost at http://www.linear.com/designtools/software/.  This software will be used to simulate circuits. You are responsible for ensuring access to a working copy.

References:

1.  Rolf Schaumann and Mac E. Van Valkenburg, Design of Analog Filters, Oxford University Press, 2001.

2.  A. S. Sedra and K. C. Smith, Microelectronic Circuits, Oxford University Press, 5th edition, 1998.

Online References:

1.  Site enables finding 1% and 5% resistor that most closely realize a desired ratio: http://www.employees.org/~bennet/teledesign/ResistorRatio.html

2.  B. Thompson, “Calculate and measure noise values,” Test & Measurement Europe, August-September 2001, available at http://www.edn.com/electronics-news/4383541/Calculate-and-measure-noise-values.

3.  W. M. Leach, Jr., “Fundamentals of low-noise circuit design,” Proceedings of the IEEE, vol. 82, issue 10, October, 1994, pp. 1515-1538, available at http://users.ece.gatech.edu/mleach/papers/AnalogNoise.pdf

 

Course Policies

Academic Honesty

General:

“Students are responsible for making themselves aware of and understanding the University policies and procedures that pertain to Academic Honesty. These policies include cheating, fabrication, falsification and forgery, multiple submission, plagiarism, complicity and computer misuse. The academic policies addressing Student Rights and Responsibilities can be found in the Undergraduate Catalog at http://catalog.wmich.edu/content.php?catoid=24&navoid=974 and the Graduate Catalog at http://catalog.wmich.edu/content.php?catoid=25&navoid=1030  If there is reason to believe you have been involved in academic dishonesty, you will be referred to the Office of Student Conduct. You will be given the opportunity to review the charge(s) and if you believe you are not responsible, you will have the opportunity for a hearing. You should consult with your instructor if you are uncertain about an issue of academic honesty prior to the submission of an assignment or test. In addition, students are encouraged to access the Code of Honor, as well as resources and general academic policies on such issues as diversity, religious observance, and student disabilities:

·        Office of Student Conduct www.wmich.edu/conduct

·        Division of Student Affairs www.wmich.edu/students/diversity

·        Registrar’s Office www.wmich.edu/registrar and www.wmich.edu/registrar/policies/interfaith

·        Disability Services for Students www.wmich.edu/disabilityservices.”

 — provided by the WMU Faculty Senate Professional Concerns Committee

Plagiarism:

For an in-depth exploration of plagiarism, see http://www.lib.usm.edu/legacy/plag/plagiarismtutorial.php.

Grading Basis

1.      Projects (80%) will be assigned on a regular basis.  LATE PROJECTS WILL NOT BE ACCEPTED AND ARE DUE AT THE BEGINNING OF CLASS. All projects are to be completed individually.  The format of project reports will be addressed in class.  Projects may consist of a series of homework-style problems from the text.  Use the prescribed homework format for those problems.

2.      Examinations and/or Quizzes (announced or unannounced):  20%

Projects may be used in lieu of examinations/quizzes.

OUTSTANDING WORK might earn extra credit.

 

Scale: 0-60 E | 60-65 D | 65-70 DC | 70-75 C | 75-80 CB | 80-85 B | 85-90 BA | 90-100 A |

EXAMINATIONS AND QUIZZES will be closed-notes closed-book unless otherwise noted. You must have a WMU issued ID with you at the exam.

 

Only under extremely unusual circumstances will make-up examinations and quizzes be considered.  Religious observances will be accommodated with advanced notice.  If an emergency prevents you from attending a scheduled examination or quiz, contact your instructor PRIOR to the test or as soon as you can reach a telephone, e-mail, etc. If the instructor cannot be reached directly, leave a message with the department (276-3150).  Failure to adhere to this policy will result in zero credit for the exercise.

 

Use of Calculators

When a calculator is allowed on a quiz/exam, without exception only models accepted by the Fundamentals of Engineering Examination may be used; see http://ncees.org/exams/calculator-policy/ for a list of approved calculators.

HOMEWORK due dates will be given in class. Each homework problem must be worked on separate page(s).  LATE HOMEWORK will not be accepted, except under extraordinary circumstances. Homework is to be completed individually.

 

Homework should normally be done on 8 1/2'' by 11'' sheets. “Engineer's Pad” sheets are preferred.  Solutions must be done in a neat, structured, logical, and orderly manner with frequent brief notations enabling the grader to readily verify the author's source of information, steps taken, sources of formula, equations, and methods used. USE THE PARTIAL CHECK LIST FOR SUBMITTED HOMEWORK BELOW.  Papers failing to meet these guidelines may not be graded and may be returned, with or without an opportunity for resubmission with a penalty.

 

PARTIAL CHECK LIST FOR SUBMITTED HOMEWORK

 

1.      Each problem must include: (a) author's name, (b) name/title of the assignment, and (c) date of completion.

2.      Use only one side of the paper and include a brief and concise statement of the problem prior to its solution. Begin each problem on a new page.

3.      Number the pages and DOUBLE SPACE the text.

4.      Staple each problem in the upper left corner as needed.

5.      Entitle graphs, label and include axes, include key symbols for multiple curve graphs, and give brief notes of explanation where appropriate.

6.      Briefly but clearly annotate your document in a way which will provide the document reader with information such as

a.      which part of the assignment is this?

b.      what is being done and why?

c.      how was it done and what are the results?

d.      how was this equation obtained and how was it used?

e.      sample calculations and definitions of symbols/parameters where appropriate; and

f.       BOX AND LABEL ANSWERS.

 

In case of conflict, information in this syllabus supersedes all other course documents.

Tentative Schedule

 

#

date

topic

 

assignment

VWS=verify result with SPICE

(use standard value components in your designs)(do not use a black background in plots)

WEEK 1

1

9/10

Course Introduction

 

Filter Review

 

The Switched Capacitor (CH 4.5 of Franco)

Switched Capacitor Filters (CH 4.6 of Franco)

Universal SC Filters (CH 4.7 of Franco)

 

Discuss Project 1

 

LTspice® in-class tutorial

read Ch 4.5-4.7 and CH 5

Project 1

VWS:  Use ideal and standard 1% component values to demonstrate the ideal and non-ideal performance of your designs.

1. 4.27

2. Implement Example 4.15 of the text using a LTC 1060 Universal Dual Filter Building Block (VWS).  Compare to the ideal transfer function.

3.  Implement Example 4.16 of the text using a LTC 1060 Universal Dual Filter Building Block (VWS).

This reference is very useful:  A Simple Method of Designing Multiple Order All Pole

Bandpass Filters by Cascading 2nd Order Sections (VWS). Compare to the ideal transfer function.

4.  EXTRA CREDIT:  Derive equation (4.26) of the text.

DUE WEEK 3

WEEK 2

2

9/17

Static Op Amp Limitations (CH 5 of Franco)

In-class work on Project 1

Discuss Project 2

 

read CH 6

 

Project 2: CH 5: 5.2, 5.3, 5.4, 5.5, 5.7, 5.11, 5.15, 5.18(a), 5.27,

5.33: (VWS)(follow HW guidelines)(see below addendum)

DUE WEEK 4

WEEK 3

3

9/24

Dynamic Op Amp Limitations (CH 6 of Franco)

PROJECT 1 DUE

Project 3: CH 6: 6.2, 6.3, 6.6 (VWS), 6.16, 6.18 (VWS),

DUE WEEK 5

WEEK 4

4

10/1

Dynamic Op Amp Limitations (CH 6 of Franco)

Project 1 Resubmission Guidance

PROJECT 2 DUE

read CH 7

WEEK 5

5

10/8

Noise (CH 7 of Franco)

PROJECT 1 RESUBMISSIONS DUE

 

PROJECT 3 DUE

 

Project 4: CH 7: 7.2, 7.4, 7.12, Example 7.7 (VWS), 7.14 (VWS)(The OP27 is available within LTspice®)

WEEK 6

6

10/15

 In-class work on Project 4

read CH 8

WEEK 7

7

10/22

Stability (CH 8 of Franco)

PROJECT 4 DUE

 

Project 5:  CH 8: Use LTspice® to replicate the results of these examples in Franco: 8.1 (page 350), 8.3 (page 360), 8.6 (page 367), 8.7 (page 368), 8.8 (page 369), 8.9 (page 370)

WEEK 8

8

10/29

In-class work on Project 5

 

WEEK 9

 

9

11/5

Review Project 2

PROJECT 1 RESUBMISSIONS DUE

 

PROJECT 5 DUE

 

read CH 9, 12

 

Project 2 Addendum:  (based on 5.33 of Franco): Design the instrumentation amplifier of Fig. 2.20 to have a gain of 100 V/V using (1) 741 op-amps and (2) LT1002 op-amps. Find the error due to v1=v2=0 and v1=v2=10V using hand analysis and SPICE. (This is a summary of what was discussed in class).

WEEK 10

10

11/12

In-class work on Project 2

 

WEEK 11

11

11/19

Nonlinear Circuits (CH 9 of Franco)

D-A and A-D converters (CH 12 of Franco)

Final Project (Design of a Microelectrode Array Amplifier) Discussion

 

Reference on delta-sigma ADCs by B. Baker:

http://www.ti.com/lit/an/slyt423/slyt423.pdf

http://www.ti.com/lit/an/slyt438/slyt438.pdf

PROJECT 2 RESUBMISSIONS DUE

 

Project 6:  CH 12: 12.1, 12.2, 12.3, 12.20, 12.25

DUE WEEK 13

 

Assign FINAL PROJECT 7

Design of a Microelectrode Array Amplifier

WEEK 12

12

12/3

Working Session

 

WEEK 13

13

12/10

Working Session

PROJECT 6 DUE

FINALS WEEK

14

12/17

7:15PM

FINAL

FINAL PROJECT 7 DUE

 

Credits

 

Adapted in part from syllabi by J. Gesink.

© 2015 Damon A. Miller. All rights reserved.

 

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